On Apple G5 benchmark

Apple has shown its next generation PowerMac G5 in WWDC in June. Its performance has been a heat issue in the recent months. Although Apple measures the performance by using the standard CPU2000 benchmark from SPEC, the test was privately conducted by independent vendor, VeriTest. Moreover, testing details was not published to SPEC as opposed to the way other vendors did. All this leads to a conclusion that it is not a fair benchmark test.

Unfortunately, the test conducted for Xeon 3.06 GHz and P4 3.0 GHz uses GCC compiler, the single processor interger performance is only 836 and 889 respectively. However, from the benchmark result posted as SPEC, the similar Dell configuration could be able to score up to 1242 for Xeon and 1151 for P4. Of course, the test was run in a very optimized envirnoment, where Windows XP and Intel C++ Compiler 7.1 are used. So I would say, the integer performance for P4 3.0 and Xeon 3.06 is much higher than G5.
For floating point performace, according to SPEC, Xeon scores 1173 and P4 scores 1229, this is ~40% higher than 840 scored by G5.

All this, on the other hand, is down to GCC compiler. It seems that the GCC 3.3 used for benchmark test is not optimized enough. According to SPEC, the POWER4+ 1.7 GHz is able to score 1077 in integer and 1598 in floating point. This time, IBM uses Visual Age as compiler. Since G5 is derived from POWER4, it should not end with this result.

According to
PowerPC 970 presentation presented at Microprocessor Forum on Oct. 2002, IBM claims that a 1.8GHz processor could be able to achieve 937 marks in integer and 1051 mark in floating point under their estimation. Apple, IBM and their engineers must work harder in optimizing GCC to squeeze all the bits from the processor.